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MMX Pentium <MMX Pentium>
Reading: M m x Pentium
Field:
Microprocessor > x86/Intel > Intel > MMX Pentium |
One of microprocessors of Intel corporation. Those which add MMX of multimedia expansion instruction set to the Pentium processor. Basic efficiency is not different from Pentium, but it is possible being maximum, to operate the software of the game and the image processing etc which are optimized in MMX to 60% high speed. The fifth generation of the x86 processor family of the same company (the P5 core) it hits. Also P55C and the like is called in order to distinguish with Pentium which does not have MMX. Interface outside corresponds to only Socket7, it is possible to replace with Pentium. Clock frequency are those of
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MMX Pentium <MMX Pentium>
Field:
Microprocessor > x86/Intel > Intel > MMX Pentium
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| One of microprocessors of Intel corporation. Basic efficiency is not different from Pentium, but it is possible being maximum, to operate the software of the game and the image processing etc which are optimized in MMX to 60% high speed. The fifth generation of the x86 processor family of the same company it hits. Also P55C and the like is called in order to distinguish with Pentium which does not have MMX. Interface outside corresponds to only Socket7, it is possible to replace with Pentium. Clock frequency are those of are also those of 120,133MHz with one for note. |
MNI <SSSE3>
Full spelling: Merom New Instuctions
Field:
Microprocessor > x86/Intel > Intel > MNI
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It is built in to the microprocessor of the Intel corporation, multimedia-related expansion instruction set. Being something which expands SSE3, it was for the first time loaded onto the Core 2 Duo processor which appears in 2006 July.
SSE mainly, the plural data can be processed at a stroke in one order being something which mounts the processing mode, shows power in especially sound and acceleration of the processing which it is related to animated picture. As for MNI those which add the order whose 32 are new anew in addition to the order of SSE3. As understood from name, it has become small-scale strengthening which compensates SSE3.
The long title, SSSE3 had not been decided and as for the time where it was called MNI of the code name, was estimated that long title becomes but name was decided in SSSE3, SSE4 came to the point of with being loaded onto the microprocessor of the next generation. |
MNP
Reading: M n tweet
Full spelling: Microcom Networking Protocol
Field:
Communication service > public network > telephone line/modem > MNP |
| The Microcom corporation (presently one section of Compaq Computer corporation) decided, the consecutive standard regarding modem. Data transfer protocol, error detection correction protocol and the data compression protocol etc which used modem are included. We have divided into nine classes, superior class has mounted the function of subordinate class basically entirely. Class 2 - As for 4 with error correction protocol, as for class 5, 7 and 9 system of data compression, with 6 method of the half duplex communications 9600bps has been defined. As for 10 in class for mobile communication, as for 8 it does not exist. |
MO <Magnet-optical disk>
Full spelling: Magneto-Optical disk
Field:
Storage > removable > MO
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The rewriting possible storage unit which jointly uses optical technology to magnetic storage system. When writing in because laser light irradiating after the data is written beforehand magnetically, densification of memory is possible. In addition, it reads out and the time in order to use only laser light, it is possible to read out the data in high speed. But capacity things such as and 640MB general, like there is also a standard which supports the bulk which exceeds 1GB.
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